Available 1 files for Digital Equipment Corporation (DEC) DC21X4 NDIS
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Company
Digital Equipment Corporation (DEC)
Categories
Networks Cards
Model
Digital Equipment Corporation (DEC) DC21X4 NDIS
Description
Drivers
Operating System
Windows 95-NT3.1-NT4
Size Driver
1.2Mb
File Name
nd3_431.zip
Observations
Release Notes - DC21X4 NDIS 3.x and 4.0 drivers Version v4.31 29-Dec-1997
This kit includes Release v4.31 of the DC21X4 NDIS 3.x and 4.0 drivers. Changes from previous release: ============================== - Add support for autosensing the size of the SROM (1Kbit or 4Kbit) and reading/writing 4Kbit SROM.
- Serialize the Link indication to the wrapper after the driver initialization.
- Set LINK_HYSTERESIS bit (CSR6<25>) for 21143 symbol Phy boards for All mediums (10 Mbps and 100 Mbps). This will check the Link presence for a longer period.
- The Driver now supports enabling of Extended PCI commands, (the commands new as of PCI spec 2.1), for those 2104x/2114x devices which support the commands. Enabling the commands may increase PCI or CardBus throughput, depending on the system implementation. As a default, the driver will enable the maximum possible number of the three Extended PCI Commands, Memory Write Invalidate (MWI); Memory Read Line (MRL); Memory Read Multiple (MRM); after verifying that the system implementation (PCI bridge chipset and BIOS) supports it.
The devices for which the commands will be enabled: 21140A rev >= 21 , 21143 rev >= 20.
Due to incompatibility problems with certain PCI host bridges and PCI-to-PCI bridges, the driver currently does not enable the Memory Write Invalidate (MWI) and Memory Read Line (MRL) commands simultaneously. The driver will only enable one of the two commands; by default, MRL will be enabled.
The driver has 3 new keywords EXT_MWI, EXT_MRM and EXT_MRL. These keyword enable and disable the operation of the respective Extended PCI Commands, to allow user override; in no case will an invalid combination be allowed.
- New OIDs to support DMI requirements.
- Fix the "Initialize Done" delay (V4.20) for the boards containing a BNC implementation too. Set the Link timeout to 5 seconds.
- Fix the SROM Extended Block Type 3 (Mii PHY Block) Reset sequence field parsing. The data for every element in the sequence must be in words.
- Change the delay for the reset sequence (at init time) to 5 Miliseconds.
- Fix the CSR13-15 values while working in MII mode; the old values (wrong) caused a performance drop while working in Autosensing mode.
- Add support for the OID: OID_GEN_MAXIMUM_SEND_PACKETS .